Fidus Solution Portfolio

We partnered with ReconRobotics®, the world leader in tactical micro-robot and personal sensor systems, to deliver critical software enhancements for their next-generation hardware platform. Our team developed and optimized the embedded software stack, enabling reliable hardware operation, efficient communication protocols, and seamless integration with system components. These enhancements provided the robust foundation needed to advance the product to its next stage of development and deployment.

We worked with an aerospace leader to provide embedded software design and FPGA engineering support for a custom space technology development platform based on AMD/Xilinx® ZU5EV architectural silicon. Our team optimized DDR4, USB3, and Ethernet communication protocols while reviewing and refining existing Vivado projects. The collaboration extended into a multi-phase engagement, ensuring seamless firmware upgrades and FPGA performance validation.

We worked with a space technology client to design and build on-board processing hardware for a Synthetic Aperture Radar (SAR-XL) satellite system, utilizing Microchip PolarFire® SoC. Our scope included hardware architecture, schematic design, PCB stack-up optimization, DDR memory routing, and FPGA firmware development. Over a 2-year engagement, we ensured the solution met space-grade validation and operational requirements for performance and reliability.

We partnered with an aerospace and defense client to upgrade a legacy airborne recording and data transfer system leveraging a Microchip PolarFire® SoC (MPFS250T-FCVG484E). Our team delivered a comprehensive FPGA staffing engagement to implement GRPCI and NANDCNTRL2 VHDL IP, I2O interfaces, and data mover FPGA command controls. We also developed design documentation and FPGA verification plans, successfully completing the project within a 14-week timeline.

We designed a multi-channel Channelizer Block using Intel® Agilex™ architectural silicon, incorporating model development, RTL design, filter design, verification, and timing closure. Utilizing tools like Intel® Quartus® Prime, HDL Coder™, MATLAB®, Python®, and NumPy™, we completed the project in just 6 weeks, ensuring exceptional Time-to-Market value. This project highlighted our expertise in FPGA development, verification, and advanced algorithm integration to deliver a high-performance solution.

Fidus partnered with the search and rescue division of a global aerospace and defense company to enhance their software suite, designed to decode emergency beacons and communicate with the appropriate authorities. The software runs on Windows Servers and is built using Java, C++, SQL Server, and MongoDB. Fidus worked closely with global teams split between Ottawa and India, to resolve issues in the first-generation product and set the foundation for the development of the second-generation system.

Fidus contributed to fixing critical bugs and participated in daily scrum meetings to address enhancements and feedback. The project also focused on potentially upgrading the software’s UI to support MongoDB for an additional client, as well as improving the existing testing and integration processes.

Fidus partnered with an aerospace and defense client. to support the development and testing of software for satellite hardware, specifically for a Low Earth Orbit (LEO) satellite payload. The project involved consolidating multiple initiatives into one, with the primary focus on board bring-up, script development, and testing of an AMD Zynq UltraScale+ MPSoC-based system. Fidus played a key role in developing Python-based test scripts, which were initially executed without hardware and later validated on real equipment.

The project also included exploring and supporting the client’s Yocto approach for secure communication and upgrades. Fidus ensured secure data transmission between the satellite and ground station, using encryption techniques for data captured by the satellite’s camera, control messages, and software upgrades. Key technologies such as Spacewire for transport, D-Bus for message exchange, and protobuf for communication serialization were used throughout the system. The development process was managed using the client’s GitLab repository with secure USB hardware keys.

A client requested Fidus to integrate their proprietary technology into a unique product. Fidus was responsible for the full development, including electronic hardware design, FPGA coding, mechanical and thermal design, and embedded software architecture. Using a Xilinx Zynq Ultrascale+ MPSoC, the project included signal conditioning, clock recovery, FMC interface, signal conversion, optical QSFP communications, and PRBS-based error detection.

The embedded application ran on Linux hosted on the quad-core Arm Cortex-A53. Deliverables included bootloader/BSP, IP over PPP, support for various USB peripherals, and data gathering from a Cortex-M4 for ADC and sensor information. We provided a Yocto build environment and Jenkins automation for future builds. The project concluded on time, within budget, and with a cohesive embedded software solution.

This 133MHz, 64-bit PCI add-in card was designed to PCI Specification and is used to provide remote access control and maintenance of high-end servers. Capable of providing remote KVM services, and operation that is truly independent of the host state (including power), this card allows the remote system administrator to recover failing or failed hosts.

This product family features video capture and forwarding functions, USB, Ethernet, and PS2, interfaces. One of the highlights of this design was the power architecture which enabled the PCI card to run from PCI power or a wall adapter or battery back-up, and the ability to intelligently select and seamlessly switch between any power source. Intelligence was provided by an Intel® processor, an Intel non-transparent bridge, and a AMD/Xilinx® FPGA.This 6U VME form factor card was designed for a defense contractor who wanted to add AIS (Automatic Identification System) to their airborne search and rescue radar system. To deliver this product, we relied on our expertise in hardware, wireless, FPGA/DSP, and embedded software design. The system highlights include an AGC system to provide incredible RF sensitivity, and an FPGA-based software defined radio DSP engine.

To bring-up, debug, and characterize this product, we used The Mathworks MATLAB® to generate a large number of test waveforms that we then loaded into our vector signal generator. In addition to extensive laboratory testing, we also had the opportunity to test our AIS equipment in various cities including Montreal, New York, Philadelphia, Seoul, and Istanbul.