Xilinx®’s Zynq UltraScale+ is a heck of a chip – APUs, RPUs, GPU, MACs, FPGA fabric, and a ton of other features. Oh my! It is a powerful, highly flexible device that is the absolute right solution for a wide variety of applications and markets. But as a wise engineer once said, “With great power comes greater complexity”. To deliver a successful Zynq UltraScale+ product, there are 6 fundamentals that must be observed. It’s not stuff like: “use 64-bit DDR4”, “use QSPI boot mode”, “your local Xilinx/Avnet FAE is” or “never spelling it ‘Zinc’”, these are all details that get figured out along the way. Instead, we implore you, focus on the 6 items found in our paper below. They will be the difference between your success or your failure.
Daunting? Fidus is ready to assist you with all or some of your Zynq UltraScale+ design. On average, we do 20 Zynq UltraScale+ designs each year, we are experts. Download our MPSoC Capability sheet for more information.