Description: In this project, our customer asked us to develop FPGA code to enable their high performance ADC (analog-to-digital converter) daughterboard to interface to an Altera® Stratix IV® evaluation board. This solution accomplishes two things: First off, it provides our customer with an additional method of evaluating and experimenting with their chipset, and secondly, it provides a piece of IP that their customers can directly incorporate into their end design.

Technologies: Altera® Stratix IV®, SignalTap®, DC1564A, HSMC, FMC, DDR, LVDS

Layers: N/A

Return to portfolio